Musashi running inside ModelSim (Step 1 kit)
Today I finished a small but important tooling milestone: a working setup where the
Musashi 68k emulator is callable from a ModelSim testbench.
This gives me a practical reference CPU inside simulation, which is useful for verification
and for building repeatable regression tests.
To keep this easy for others to reproduce, I’m sharing a pre-made ZIP kit that contains:
the folder structure, VHDL package/testbench files, and text instructions (manual steps).
Download
File: Musashi_ModelSim_Step1_Kit_manual_v1
What it is: a ready-to-unzip scaffold + manual build/run instructions.
What you need
- ModelSim (tested with ModelSim Altera / Quartus 13.x)
- MinGW (GCC) for building the Musashi reference DLL
Quick idea of how it works
- Musashi is compiled as a DLL that ModelSim can load.
- A small VHDL package exposes a clean interface from VHDL to the DLL.
- The included testbench can produce a simple execution/bus trace.
What you should see
- ModelSim successfully loads the Musashi DLL (no FLI/DLL errors).
- The testbench runs and produces a text trace file.
- You can open waves for the testbench signals (clock/reset/state/trace events).
Next steps
This Step 1 kit is only the foundation. Next I’ll use it to build a real verification flow:
- Step 2: standardize a bus/PC trace format (so runs are comparable)
- Step 3: run the same tiny programs on two models and diff the traces
- Step 4: turn it into a regression test that catches CPU/RTL bugs early
Credits
Musashi emulator by Karl Stenerud. This kit is only an integration scaffold + notes.
Notes / disclaimer
This is a developer tool and may evolve quickly. If something changes, I’ll publish updated kits
as follow-up posts (Step 2 / Step 3).
