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Vampire 600 V1: First testings on new PCB
Posted on Monday, August 20 2012 @ 13:45:14 CDT by majsta

PCB's are received and one assembled for testings. Since I had only one partly functional A600 board I have done only testings regarding disabling original CPU and accelerator board was started and if you look at the logic analyzer you can see that TG68 core is started but since motherboard was not completely functional I was unable to do more. Now I m waiting for logic probes and package of different PLCC sockets so I can investigate rest of chips on motherboard to find out which one is broken.

Changes regarding this PCB version.
1. New Voltage Level Translators used, now I have complete, total CMOS to LVCMOS and now vice verse, I replaced 5V I/O tolerant devices with dual voltage drivers.
2. Included MicroSD socket.
3. RESET signal separated into RESET_A(input to FPGA) and RESET_B(output from FPGA) because RESET is bidirectional signal.
4. HALT signal also separated into HALT_A(input to FPGA) and HALT_B(output to FPGA) so FPGA sends low state to MC68K usind HALT_B tristating Data and Address bus of original CPU. In the same time FPGA is able to receive HALT_A to confirm that operation is successful.
5. For disabling old CPU 2-wire arbitration is used. FPGA sends low active state using BR receiving low active state BG from MC68K. BGACK is ignored here but left as output signal from FPGA if needed for 3-wire bus arbitration.
6. R/W signal is working and according to that Voltage Level Translators dedicated to bidirectional Data Bus are changing direction of input and output side.

Problems:
1. I don't have any single one working A600 motherboard because I destroy 7 of them in process of learning.
2. I need to repair those or buy new one and that's take money and time, time I have but no money but I m shore that I will overcome this.
Again thank you all for money or hardware donations and check other pictures in Read More, Pictures, Files... section on this Info.


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